diff --git a/sources/zweic/Generator.scala b/sources/zweic/Generator.scala
index 6cc4107..8356de4 100644
--- a/sources/zweic/Generator.scala
+++ b/sources/zweic/Generator.scala
@@ -132,21 +132,13 @@
 	  genLoad(body, RES); // fs = params + this + lnk + ...
 	  code.freeRegister(RES);
 
-	  //code.emit(SUBI, SP, SP, code.getFrameSize() - (4+4+4*params.length) );
-	  //code.decFrameSize(code.getFrameSize()); // fs = 0
- 	  //code.incFrameSize(4+4+4*params.length); // fs = params + this + lnk
-
-	  //code.emit(POP, LNK, SP, 4);
-	  //code.decFrameSize(4); // fs = params + this
-
-	  //code.emit(SUBI, SP, SP, params.length*4+4);
 	  //TODO FP
-	  code.emit(POP, LNK, SP, code.getFrameSize()-params.length*4);
+	  code.emit(POP, LNK, SP, code.getFrameSize()-params.length*4 + 4);
 
 	  code.decFrameSize(code.getFrameSize()); // fs = 0
 	  code.incFrameSize(oldFrameSize); // fs = oldframesize
 	
-	  code.emit(RET, LNK, "end -- " + method.self + "::" + name);
+	  code.emit(RET, LNK);
 	
 	
 
@@ -252,20 +244,21 @@
 		  }
 
       case Binop(op, left, right) =>
-		genTmp { tmpLeft =>
-		  genLoad(left, tmpLeft);
-			genLoad(right, targetReg);
+		//TODO: move gemTmp into each operator...
+		  genLoad(left, targetReg);
+		genTmp { tmpRight =>
+		  genLoad(right, tmpRight);
 			op match {
 			  case Operators.ADD =>
-				code.emit(ADD, targetReg, tmpLeft, targetReg, "+");
+				code.emit(ADD, targetReg, targetReg, tmpRight, "+");
 			  case Operators.SUB => 
-				code.emit(SUB, targetReg, tmpLeft, targetReg, "-");
+				code.emit(SUB, targetReg, targetReg, tmpRight, "-");
 			  case Operators.MUL =>
-				code.emit(MUL, targetReg, tmpLeft, targetReg, "*");
+				code.emit(MUL, targetReg, targetReg, tmpRight, "*");
 			  case Operators.DIV =>
-				code.emit(DIV, targetReg, tmpLeft, targetReg, "/");
+				code.emit(DIV, targetReg, targetReg, tmpRight, "/");
 			  case Operators.MOD =>
-				code.emit(MOD, targetReg, tmpLeft, targetReg, "%");
+				code.emit(MOD, targetReg, targetReg, tmpRight, "%");
 			  case _ =>
 				val store0 = code.getLabel();
 				val end = code.getLabel();
@@ -286,12 +279,12 @@
 		//TODO: is it really needed to do code.getFrameSize() and code.setFrameSize()
 		val fs = code.getFrameSize();
 
-		code.freeRegister(targetReg);
+		//code.freeRegister(targetReg);
 		stats.foreach(gen);
-		code.getRegister(targetReg);
+		//code.getRegister(targetReg);
 		genLoad(main, targetReg);
 	  
-		//OPTIMISATION: only reset SP if it has changed
+		//only reset SP if it has changed
 		if (code.getFrameSize() - fs != 0) {
 		  code.emit(ADDI, SP, SP, code.getFrameSize()-fs, "end of block SP reset");
 		}
@@ -302,8 +295,8 @@
 		if ( name.name == "this" ) {
 			code.emit(LDW, targetReg, SP, code.getFrameSize()-4, name.name + " FS:" + code.getFrameSize());
 		} else {
-		  code.emit(LDW, targetReg, SP, code.getFrameSize() - name.sym.offset, //- 4, 
-					name.name + " offset: "+ name.sym.offset + " FS:" + code.getFrameSize());
+		  code.emit(LDW, targetReg, SP, code.getFrameSize() - name.sym.offset, 
+					name.name )//+ " offset: "+ name.sym.offset + " FS:" + code.getFrameSize());
 		}
 
       case New(name, args) =>
@@ -344,7 +337,9 @@
 		var freed:List[Int] = Nil;
 
 		for ( val i <- Iterator.range(0, used.length)) {
+
 			if ( used(i) && i != targetReg ) {
+				//code.emit(ADD,ZERO,ZERO,ZERO,targetReg +  " tmp " + i);			  
 				code.emit(PSH, i, SP, 4);
 				code.incFrameSize(4);
 				code.freeRegister(i);
@@ -352,51 +347,47 @@
 			}
 		}
 
-		genTmp { thisReg =>		
 		  // get 'receiver' and put it as 'this' on the stack
-		  genLoad(receiver, thisReg);
+		  genLoad(receiver, targetReg);
 
 		  // check receiver != null
 		  val okLabel = code.getLabel();
-		  code.emit(BNE, thisReg, okLabel);
-		  emitLoadConstant(thisReg, 1);
-		  code.emit(SYSCALL, thisReg, ZERO, SYS_EXIT);
+		  code.emit(BNE, targetReg, okLabel);
+		  emitLoadConstant(targetReg, 1);
+		  code.emit(SYSCALL, targetReg, ZERO, SYS_EXIT);
 		  code.anchorLabel(okLabel);
 
 		  //put 'this' on stack
-		  code.emit(PSH, thisReg, SP, 4);
+		  code.emit(PSH, targetReg, SP, 4);
 		  code.incFrameSize(4);
 		
 		  //TODO: 
 		  //load vmt pos
-		  code.emit(LDW, thisReg, thisReg, 0);
+		  code.emit(LDW, targetReg, targetReg, 0);
 
 		  //load method address
-		  code.emit(LDW, targetReg, thisReg, method.sym.offset);
-		}
-
+		  //code.emit(LDW, targetReg, thisReg, method.sym.offset);
+		  
 		// put args on stack
 		genTmp { tmpReg =>
+		  code.emit(LDW, tmpReg, targetReg, method.sym.offset);
+
+
 		  for ( val a <- args ) {
-			genLoad(a, tmpReg);
-			code.emit(PSH, tmpReg, SP, 4);
+			genLoad(a, targetReg);
+			code.emit(PSH, targetReg, SP, 4);
 			code.incFrameSize(4);
 		  }
+
+		  //save current position + 8 (after RET)
+		  code.emit(ORIU, LNK, ZERO, code.pc() + 8, "call " + 
+					method.sym.name.toString() + " offset:" + method.sym.offset.toString());
+	  
+		  //call function
+		  code.emit(RET, tmpReg);
+
 	    }
-
-
-// 	  //TODO
-// 	  // check receiver.method() != null
-
-
-	  //save current position + 8 (after RET)
-	  code.emit(ORIU, LNK, ZERO, code.pc() + 8, "call " + 
-				method.sym.name.toString() + " offset:" + method.sym.offset.toString());
 	  
-	  //call function
-	  code.emit(RET, targetReg);
-	  
-	  //TODO store return value
 	  if (targetReg!=RES) {
  		code.emit(ADDI, targetReg, RES, 0, "store return value to target reg");
 	  }